Download Digitally-Assisted Analog and RF CMOS Circuit Design for by Shouhei Kousai (auth.), Kenichi Okada, Shouhei Kousai (eds.) PDF

By Shouhei Kousai (auth.), Kenichi Okada, Shouhei Kousai (eds.)

This booklet describes the cutting-edge in RF, analog, and mixed-signal circuit layout for software program outlined Radio (SDR). It synthesizes for analog/RF circuit designers an important basic layout ways to exploit the latest CMOS expertise, which could combine thousands of transistors, in addition to a number of actual examples from the newest examine effects. assurance comprises each circuit block for a SDR transceiver, together with receiver, transmitter, neighborhood oscillator, analog baseband, ADC and DAC, in order that the readers can comprehend a number of functions of the digitally-assisted circuit ideas presented.

  • Provides numerous methods to gain a transceiver for a SDR utilizing contemporary CMOS expertise, during which speedy and thousands of transistors can be found;
  • Covers whole transceiver circuit blocks, together with receiver and transmitter front-ends, neighborhood oscillators, analog baseband, ADCs and DACs;
  • Offers analog/RF circuit designers a single-source element of access to the state-of-the artwork in RF, analog, and mixed-signal circuit layout for software program outlined Radio (SDR).

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Extra info for Digitally-Assisted Analog and RF CMOS Circuit Design for Software-Defined Radio

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11, pp. 2500–2511, Nov. 2006. 20. D. , “A Single-Chip 10-Band WCDMA/HSDPA 4-Band GSM/EDGE SAW-less CMOS Receiver with DigRF 3G Interface and +90 dBm IIP2”, IEEE J. Solid-State Circuits, vol. 44, no. 3, pp. 718–739, March 2009. 21. S. ,“Second-Order Intermodulation in Current-Commutating Passive FET Mixers,” IEEE Transactions on Circuits and Systems I, vol. 56, no. 12, pp. 2556–2568, Dec. 2009. 22. I. , “IIP2 calibration by injecting DC offset at the mixer in a wireless receiver,” IEEE Trans. , vol.

They all came from commercial efforts involving large design teams so a reasonable effort to reduce area and power can be assumed. The very first published report of an RF-SoC was in 2001 from Alcatel [14] targeting the Bluetooth standard. Its silicon area was 40 mm2 in 250 nm CMOS. It was a significant commercial endeavor but, to the author’s best knowledge, the chip never went into volume production. The second published RF-SoC [7] was from the author’s former group in Texas Instruments (TI).

12. B. Debaillie, P. Van Wesemeal, and J. Craninckx, “Calibration of SDR Circuit Imperfections,” in Proc. IEEE Global Telecommunications Conf. (GLOBECOM), 2008, pp. 1–5. 13. J. , “Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS”, IEEE J. Solid-State Circuits, vol. 43, no. 11, pp. 2422–2433, Nov. 2008. 14. X. He and J. van Sinderen, “A Low-Power, Low-EVM, SAW-Less WCDMA Transmitter Using Direct Quadrature Voltage Modulation”, IEEE J. Solid-State Circuits, vol. 44, no. 12, pp.

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